(1) Field of the Invention
This invention relates to a drive circuit for a Bloch line memory. More particularly, the present invention relates to a drive circuit which drives a Bloch line memory by a bias magnetic field pulse. The drive circuit for a Bloch line memory in accordance with the present invention can be applied to drive circuits for the Bloch line memory used as a memory of computers and various communication equipment besides data terminals, POS terminals, word processors, NC machines, various measuring instruments, and the like.
(2) Description of the Prior Art
In comparison with conventional magnetic bubble memories, a Bloch line memory is a solid-state magnetic memory that can increase 30 to 100 times the memory density. Whereas the magnetic bubble memory stores the logic "1" or "0" of data in correspondence to the existence or absence of a magnetic bubble in a magnetic thin film, the Bloch line memory uses as its data carrier a Bloch line pair that exists in the domain wall of a stripe domain corresponding to the stretched bubble.
The Bloch line memory is, in principle, a shift register type memory in the same way as the magnetic bubble memory. Therefore, the Bloch line pair as the data carrier is necessary to propagate inside the domain wall. The Bloch line pair is propagated by applying a pulsed bias magnetic field to the stripe domain, which causes the domain wall move and results through the gyro effect the transverse propagation of the Bloch line pair along the domain wall. The wave form of the pulsed bias magnetic field was contrived to provide the transverse propagation in one direction.
A pulse bias magnetic field having a rise time of 50 to 100 ns, a fall time of 300 ns to 2 .mu.s and an amplitude of 5 to 10 Oe is employed to propagate the Bloch line pair. The propagation of the Bloch line pair in one direction is realized by the different pulse rise time from the pulse fall time.
An example of a memory module generating such a pulse bias magnetic field is described in the resume of 8th Meeting of Japan Applied Magnetism Society, Nov. 1984, p. 94. The outline of the memory module will be described with reference to FIG. 3 of the accompanying drawings.
A bias magnetic field pulse is generated by using a magnetic circuit having a cross-sectional view such as shown in the drawing. Rectangular magnetic plates 32 and 33 are placed above and below a Bloch line memory device 31 and they are surrounded by a shield case 34. Bias magnetic field coils 35 and 36 are wound around the side surfaces of the rectangular magnetic plates 32 and 33, respectively. A current pulse (amplitude: approx. 0.2 to 2 A, rise time: 50 to 100 ns, fall time: 300 ns to 2 .mu.s) having a waveform 41 as shown in FIG. 4 is supplied to the bias field coils 35 and 36 to generate the pulsed bias magnetic field described above.
An example of a drive circuit for the pulsed bias magnetic field of such a memory module is disclosed in Japanese Patent Laid-Open No. 207011/1984. As shown in FIG. 5, when a first switching element 51 is turned on, a pulsed current is supplied to a bias field coil 53 from a D.C. constant voltage source 52-1. The pulsed current amplitude i.sub.L (t) is given by the formula (1) below with E.sub.s1 representing the voltage of the D.C. constant voltage source 52-1 and E.sub.T representing the ON voltage of the switching element 51: ##EQU1##
Next, when the first switching device 51 is turned off, the second switching device 54 is turned on at t=.tau..sub.1. Then the pulsed current flows from the D.C. constant voltage source 52-1 to the D.C. constant voltage source 52-2 through the coil 53, the second switching device 54 and a resistor 55. The pulsed current amplitude at .tau..sub.1 .ltoreq.t.ltoreq..tau..sub.2 is given by the formula (2) below with E.sub.s2 representing the voltage of the D.C. constant voltage source 52-2 and E.sub.T representing the ON voltage of the first and second switching device 51 and 54. ##EQU2## Here, .rho..sub.2 is given by the formula (3) below: ##EQU3##
Therefore, the pulsed current waveform through the bias field coil driven by the drive circuit becomes as shown in FIG. 6. In the drive circuit, the power loss of the switching devices 51 and 54 is small.
However, the inventors of the present invention realized that power consumption in the drive circuit is impractically large. The following technical problems are yet left unsolved. The drive circuit shown in FIG. 5, the pulsed current flows from the D.C. constant voltage source 52-1 to the bias field coil 53 during 0.ltoreq.t.ltoreq..tau..sub.1. The pulsed current flows from the D.C. constant voltage source 52-1 to the D.C. constant voltage source 52-2 through the bias field coil 53, the switching device 54 and the resistor 55 during .tau..sub.1 .ltoreq.t.ltoreq..tau..sub.2. Therefore, the current is supplied from the D.C. constant voltage source 52-1 and is absorbed by the D.C. constant voltage source 52-2. If the memory device to be driven is about 15 mm square, the volume of the portion of the memory module shown in FIG. 3 to which the magnetic field is to be applied is 20 mm.times.20 mm.times.3 mm which is approx. 1.2.times.10.sup.-6 m.sup.3. The inductance of the coil is about 1 .mu.H if a bias magnetic field pulse having an amplitude of 10 Oe is supplied by the coil current amplitude of 1 A. With the pulse amplitude of the current pulse of 1 A, the rise time of 50 ns, the fall time of 500 ns and the repetition period of 1 MHz, the voltage of the power source 52-1 of 20 V and that of the power source 52-2 of 22 V are necessary. The power consumption of the power source 52-1 is 5.3 W and that of the power source 52-2 is 5.5 W. To reduce the power consumption, a circuit 50 for returning the current absorbed by the power source 52-2 to the power source 52-1 may be added. However, the addition of such a circuit results in the increase in the number of circuit components and in a more complicated circuit configuration.